@phdthesis{Sim12,
title = { Harnessing Forest Automata for Verification of Heap Manipulating Programs },
author = {Sim{\'a}cek, Jir\'{\i}},
year = {2012},
pages = {128},
publisher = {Universit\'{e} de Grenoble},
team = {DCS},
location = {Grenoble, FR},
language = {english},
}
bibtex
Navigation
Actualités
- Conférences
- 24-28 Novembre 2025 Synchron 2025
Séminaires
- Séminaires
- 13 novembre 2025 Yann Herklotz: Towards scalable verification and efficient hardware generation using verified (…)
- 21 novembre 2025 Oussama Oulkaid: Formal models of integrated circuits for transistor level electrical verification (Phd)
- 25 novembre 2025 Véronique Cortier: Electronic voting: design, attack, and formal verification
- 1er décembre 2025 Sylvain Boulme: Introduction à la programmation orientée objet en crystal
- 4 décembre 2025 Jannik Laval: A venir (thème cybersécu)
- 11 décembre 2025 Thaïs Baudon: A venir (thème: compilation optimisant les représentations mémoire)
Nouvelles publications
- Quelques Publications
Récentes
- Thomas Vigouroux, Marius Bozga, Cristian Ene, Laurent Mounier: Function Synthesis for Maximizing Model Counting
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: On Self-stabilizing Leader Election in Directed Networks
- Akram Idani, Yves Ledru, German Vega: Formal model-driven security combining B-method and process algebra: The B4MSecure platform
- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian: Modeling Techniques for the Formal Verification of Integrated Circuits at Transistor-Level: Performance Versus Precision Tradeoffs
Offres d'emploi et stages
- Offres d'emploi et stages
- [Funded PhD] Fault Injection Attacks : Automated Analysis of Counter-Measures At The Binary Level
- [Master] Decision Procedure for Equivalence Relations
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences