The Symposium on Stabilization, Safety, and Security of Distributed Systems is an international forum for researchers and practitioners working on the design and development of distributed systems that guarantee specific desired properties despite adversity, or that are able to restore the desired properties following adversarial perturbations in the computing medium building on the principles of self-stabilization. Research in distributed computing and distributed systems continues its vibrant development, marked by the importance of dynamic systems, such as peer-to-peer networks, large-scale wireless sensor networks, mobile ad hoc networks, mobile agent computing, opportunistic networks etc. Moreover, new applications such as grid and web services, banking and e-commerce, e-voting, e-health and robotics, aerospace and avionics, automotive, industrial process control, have joined the expanded landscape of distributed systems. It is becoming increasingly important to endow all such systems with built-in means for self-management, self-protection, and self-repair. The symposium encourages the submission of original contributions spanning fundamental research and practical applications within its scope, covered by the five symposium tracks.
SSS’2016
18th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2016)
Voir en ligne : SSS’2016
Navigation
Rubriques
-
Verimag
- Membres
- Publications
- Outils
- Thèse en cours
- Emplois et stages
- Projets
- Partenaires
-
Colloques et Conférences
- 20 ans de Verimag, 26-28 (…)
- École d’été PERSYVAL-Lab (…)
- ACES’2008 September 29th, (…)
- ADSL 2018
- ADSL 2020 (@POPL 2020)
- AlgoTel 2017
- AlgoTel et CoRes 2020
- ARCH14
- ARTIST Summer School in (…)
- ARTIST2 Summer School 2008 (…)
- ASL 2022 : Advances in Separat
- AVM 2014
- AVoCS 2019
- BEeSy 2015
- CAPITAL Workshop - sCalable
- CAS 2012, January 13, Grenoble
- CAV 2009 June 26 - July (…)
- EMSOFT 2009 October 12 - (…)
- ETAPS 2014
- Euro-Par 2016
- FAC 2014
- FIMCP 2013, May 2nd, Marrakech
- FORMATS 2014
- FORMATS 2015
- GreHack 2016
- GT Verif 2018
- HSB 2014
- HSCC 2012, Apr 17-19, Beijing
- ICDCN 2012, January 3-6, (…)
- IWHSB 2013
- Journée informatique frugale
- MEMOCODE 2010, July 26-28,
- MEMOCODE 2011, July 11-13, (…)
- MeTRiD 2018
- MOVEP 2020
- RESSI 2017
- RTNS 2017
- RV 2018
- SSS 2020
- SSS’2011, October 10-12, (…)
- SSS’2016
- Synchron 2019
- SynCoP 2014
- Toward Systems Biology 2011,
- VECoS 2018
- VVS
- WCET 2013, July 9, 2013, (…)
- WFAC’2008 - October 19th, (…)
- Workshop CAPITAL
- Workshop CAPITAL 2022 : (…)
- Workshop on Timing Anomalies
- RESSI 2017 : les Rendez-vous
- Séminaires
- Documents
- Axes
- Contact
- Plan du site
Actualités
Séminaires
- Séminaires
- 28 novembre 2024 Grégoire Bussone: Réduire les copies et l'utilisation mémoire dans les langages synchrones
- 2 décembre 2024 Thomas Vigouroux: Analyses quantitatives pour les attaquants adaptatifs (Phd)
- 12 décembre 2024 Lucas Bueri: Tba (Phd)
- 12 décembre 2024 Bob Aubouin-pairault: Tba (Phd)
Nouvelles publications
- Quelques Publications
Récentes
- Karine Altisen, Stéphane Devismes, Erwan Jahier: sasa: a SimulAtor of Self-stabilizing Algorithms
- Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler
- Bruno Ferres, Oussama Oulkaid, Ludovic Henrio, Mehdi Khosravian, Matthieu Moy, Gabriel Radanne, Pascal Raymond: Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory
- Karine Altisen, Pierre Corbineau, Stéphane Devismes: Certification of an exact worst-case self-stabilization time
Offres d'emploi et stages
- Offres d'emploi et stages
- [Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
- Bourses PERSYVAL de M2
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis ?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences